Aspeed Ast2500 Datasheet -

The Aspeed AST2500: A Highly Integrated BMC for Advanced Server Management

I hope this helps! Let me know if you have any questions or if you'd like me to clarify anything. Aspeed Ast2500 Datasheet

• Spec: 10-bit resolution, 8 channels.
• Voltage Range: 0V to 1.8V (Not 3.3V!). To read 12V rails, you need an external resistor divider (the datasheet provides a formula: R1/R2 = 6.66:1 to scale 12V down to 1.5V).
• Accuracy: ±1% typical, ±3% maximum over temperature.

2. Block Diagram (High-Level)

+----------------+      +------------------+      +-----------------+
|   ARM Cortex   |      |   DDR4/DDR3      |      |   PCIe Gen2     |
|   A7 (800 MHz) |<---->|   Controller     |<---->|   RC/EP         |
+----------------+      +------------------+      +-----------------+
        |                         |                         |
        v                         v                         v
+----------------+      +------------------+      +-----------------+
|    L1/L2 Cache  |      |    VGA / 2D Engine|      |   USB 2.0 Host  |
|    (8KB/256KB) |      |    (1920x1200)    |      |   (2x)          |
+----------------+      +------------------+      +-----------------+
        |                         |                         |
        v                         v                         v
+---------------------------------------------------------------+
|                  Advanced Peripheral I/O                       |
|   UARTs, I2C, SPI, eMMC, SDIO, PWM, ADC, GPIOs (200+)        |
+---------------------------------------------------------------+
        |                         |                         |
        v                         v                         v
+----------------+      +------------------+      +-----------------+
|   Security      |      |   MAC (2x)       |      |   LPC/eSPI      |
|   Engine        |      |   (10/100/1000)  |      |   Bridge        |
+----------------+      +------------------+      +-----------------+

• PCIe Base Specification Revision 2.0 (for endpoint configuration)
• SMBIOS Specification (for IPMI integration)
• DDR4 JEDEC Standard JESD79-4

4.3 PCIe & Host Communication

• PCIe Gen2 x1 root port (also configurable as endpoint).
• LPC/eSPI bridge to host PCH/CPU for legacy I/O.
• DMA engines for high-speed data transfer.